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deps: patch V8 to support compilation on win-arm64 

PR-URL: https://github.com/nodejs/node/pull/47251
Reviewed-By: Yagiz Nizipli <yagiz@nizipli.com>
Reviewed-By: Jiawen Geng <technicalcute@gmail.com>
Reviewed-By: Rafael Gonzaga <rafael.nunu@hotmail.com>
Reviewed-By: Richard Lau <rlau@redhat.com>
pull/47344/head
Michaël Zasso 2023-03-20 15:46:39 +01:00 committed by Node.js GitHub Bot
parent a7c129f286
commit 7eb0ac3cb6
4 changed files with 21 additions and 14 deletions
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2
common.gypi
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@ -36,7 +36,7 @@
# Reset this number to 0 on major V8 upgrades.
# Increment by one for each non-official patch applied to deps/v8.
'v8_embedder_string': '-node.2',
'v8_embedder_string': '-node.3',
##### V8 defaults for Node.js #####

5
deps/v8/src/execution/arm64/simulator-arm64.cc vendored
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@ -34,6 +34,11 @@
#include "src/trap-handler/trap-handler-simulator.h"
#endif // V8_ENABLE_WEBASSEMBLY
#if defined(_MSC_VER)
// define full memory barrier for msvc
#define __sync_synchronize _ReadWriteBarrier
#endif
namespace v8 {
namespace internal {

4
deps/v8/src/trap-handler/trap-handler-simulator.h vendored
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@ -34,8 +34,10 @@ uintptr_t ProbeMemory(uintptr_t address, uintptr_t pc)
// "ProbeMemory", but we want something more expressive on stack traces.
#if V8_OS_DARWIN
asm("_v8_internal_simulator_ProbeMemory");
#else
#elif !defined(_MSC_VER)
asm("v8_internal_simulator_ProbeMemory");
#else // MSVC
;
#endif
} // namespace v8::internal::trap_handler

24
deps/v8/test/cctest/test-assembler-arm64.cc vendored
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@ -14771,12 +14771,12 @@ static void AtomicMemoryWHelper(AtomicMemoryLoadSignature* load_funcs,
AtomicMemoryStoreSignature* store_funcs,
uint64_t arg1, uint64_t arg2, uint64_t expected,
uint64_t result_mask) {
uint64_t data0[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data1[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data2[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data3[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data4[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data5[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data0[2] = {arg2, 0};
uint64_t data1[2] = {arg2, 0};
uint64_t data2[2] = {arg2, 0};
uint64_t data3[2] = {arg2, 0};
uint64_t data4[2] = {arg2, 0};
uint64_t data5[2] = {arg2, 0};
SETUP();
SETUP_FEATURE(LSE);
@ -14838,12 +14838,12 @@ static void AtomicMemoryXHelper(AtomicMemoryLoadSignature* load_funcs,
AtomicMemoryStoreSignature* store_funcs,
uint64_t arg1, uint64_t arg2,
uint64_t expected) {
uint64_t data0[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data1[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data2[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data3[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data4[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data5[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data0[2] = {arg2, 0};
uint64_t data1[2] = {arg2, 0};
uint64_t data2[2] = {arg2, 0};
uint64_t data3[2] = {arg2, 0};
uint64_t data4[2] = {arg2, 0};
uint64_t data5[2] = {arg2, 0};
SETUP();
SETUP_FEATURE(LSE);